1. Field of the Invention
The present invention relates to a buffer circuit and a photoreceiving circuit using the same.
2. Description of Related Art
In recent years, recording media such as CDs and DVDs have been widely spread. Such optical recording media are fabricated with dedicated recorders, and techniques are developed daily to improve the recording rate. A photoreceiving IC provided on a pickup unit in such a recorder has a function that converts light reflected from an optical disk into a current with a photoreceiving device and converts it into a voltage signal in a current-voltage conversion circuit. In order to enhance the speed of a recorder, it is required to enhance the speed of a photoreceiving IC used in a pickup unit.
FIG. 7 shows a related circuit diagram disclosed in Japanese unexamined Patent Application Publication No. 60-190011. As shown in FIG. 7, the related example has a configuration in which a PD 2 functioning as an input source is connected to an emitter of a transistor 14. A base of the transistor 14, whose base is grounded, has a small impedance, and furthers the impedance of the emitter is extremely small value because it is a product of the base impedance and a reciprocal of a current amplification rate. This reduces the influence on the frequency characteristics due to parasitic capacitance component of the PD 2. FIGS. 8A and 8B show graphs of the frequency characteristics in this case. Using the transistor 14 enables to obtain good frequency characteristics without generating a peak even in a case that the parasitic capacitance of the PD 2 varies.
The following sections describe the offset voltage in the related example of FIG. 7.
The sum of the emitter current of the transistor 14 and input current IPD from the PD 2 is fixed at constant current I by a constant current circuit 15. Accordingly, collector current IC1 of the transistor 14 is, when the base current is defined as IB1, expressed as:IC1=I−IPD−IB1  (1).
Collector current IC2 of a transistor 18 provided as a reference current is, when the base current is defined as IB2, expressed as:IC2=I−IB2  (2).
Since IC1 and IC2 become almost equal by a current mirror circuit 16, current IR flowing in a resistor 17 is expressed as:IR=IC2−IC1=IPD+IB1−IB2  (3).
Further, when the transistors 14 and 18 have an identical transistor configuration in which the following relationship holds:IB1−IB2  (4),an output signal voltage Vs is expressed as, in a case of a voltage Vref as a reference, defining the value of the resistor 17 as R:VS=IR×R=IPD×R  (5)
According to Expression (5), the offset voltage in a case of no optical input (IPD=0) is, expressed as:VS=IPD×R=0,and understood that it is not generated.
The following sections describe the offset voltage in the related photoreceiving IC shown in FIG. 7, in a case that power supply voltage Vcc or voltage Vref varies.
In the current mirror circuit 16, the collector-emitter voltage of a transistor 19 has a value equivalent to each base-emitter voltage of the transistors 20 and 21, and thus always becomes constant. In contrast, since the collector voltage of the transistor 21 is voltage Vref, the collector-emitter voltage varies depending on power supply voltage Vcc or voltage Vref.
For this reason, although collector current IC2 of the transistor 19 is constant relative to the variation of power supply voltage Vcc and voltage Vref, collector current IC1 of the transistor 21 varies depending on the Early voltage effect. Hence, IC1 and IC2 become out of balance to generate power supply voltage dependence of the offset voltage. The Early voltage effect of the transistor is expressed as:IC=IS(1+VCE/VA)exp(VBE/VT)  (6),IS: a constant indicating transfer characteristics of the transistor in the forward active region,VA: the Early voltage,VT=kT/q≈26 mV at 300 K.
The following sections discuss the influence mentioned above in the related photoreceiving IC in FIG. 7. In this discussion, current variation generated by the power supply voltage variation is indicated by adding Δ to the names of current shown in FIG. 7.
A current change ΔIR due to the power supply voltage variation is added in Expression (3), and Expression (4) of the relationship of the base current and Expression (6) of the Early voltage effect are substituted in the added expression as:
                                                                                             IR                  +                                      Δ                    ⁢                                                                                  ⁢                    IR                                                  =                                ⁢                                                      (                                                                  I                                                  C                          ⁢                                                                                                          ⁢                          2                                                                    -                                              I                                                  C                          ⁢                                                                                                          ⁢                          1                                                                                      )                                    +                                      (                                                                  Δ                        ⁢                                                                                                  ⁢                                                  I                                                      C                            ⁢                                                                                                                  ⁢                            2                                                                                              -                                              Δ                        ⁢                                                                                                  ⁢                                                  I                                                      C                            ⁢                                                                                                                  ⁢                            1                                                                                                                )                                                                                                                          =                                ⁢                                                      I                    PD                                    +                                                            I                      S                                        ⁢                                          {                                                                        (                                                                                    Δ                              ⁢                                                                                                                          ⁢                                                              V                                                                  CE                                  ⁢                                                                                                                                          ⁢                                  2                                                                                                                      -                                                          Δ                              ⁢                                                                                                                          ⁢                                                              V                                                                  CE                                  ⁢                                                                                                                                          ⁢                                  1                                                                                                                                              )                                                /                                                  V                          A                                                                    }                                        ⁢                                                                  exp                        ⁡                                                  (                                                                                    V                              BE                                                        /                                                          V                              T                                                                                )                                                                    .                                                                                                                                (          7          )                    In Expression (7), ΔVCE2 denotes the collector-emitter voltage variation of the transistor 19, and ΔVCE1 is the collector-emitter voltage variation of the transistor 20.
When the following expressions are supposed to hold:ΔVCE=ΔVCE2−ΔVCE1  (8);IR+ΔIR=IPD+IS(ΔVCE/VA)exp(VBE/VT)  (9),addition of an output voltage change ΔVS generated by the power supply voltage variation into Expression (5) is expressed as:
                                                                                                                 V                    S                                    +                                      Δ                    ⁢                                                                                  ⁢                                          V                      S                                                                      =                                ⁢                                                      (                                          IR                      +                                              Δ                        ⁢                                                                                                  ⁢                        IR                                                              )                                    ×                  R                                                                                                        =                                ⁢                                                      {                                                                  I                        PD                                            +                                                                                                    I                            S                                                    ⁡                                                      (                                                          Δ                              ⁢                                                                                                                          ⁢                                                                                                V                                  CE                                                                /                                                                  V                                  A                                                                                                                      )                                                                          ⁢                                                  exp                          ⁡                                                      (                                                                                          V                                BE                                                            /                                                              V                                T                                                                                      )                                                                                                                }                                    ⁢                                      R                    .                                                                                                            (          10          )                    
The offset voltage in a case of no optical input (IPD=0) is expressed as:VS+ΔVS={IS(ΔVCE/VA)exp(VBE/VT)}×R  (11).According to Expression (11), it is found that the difference ΔVCE between the collector-emitter voltages generated by the power supply voltage variation becomes a variable and the offset voltage varies. The related example does not disclose means to solve such problem.